ARM Cortex Cores in This Project
The Khadas VIM3, Raspberry Pi 5, and Raspberry Pi Pico boards all sit in the same broad computing family, but their Cortex cores are designed for very different jobs. Understanding that distinction makes it easier to choose the right board instead of judging everything by core count or clock speed.
Application Cores and Microcontroller Cores
| Family | Example here | Designed for |
|---|---|---|
| Cortex-A | VIM3 A73/A53, Pi 5 A76 | Running Linux, applications, filesystems, networks, databases, and many processes at once |
| Cortex-M | RP2040 M0+, RP2350 M33 option | Low-power control, GPIO, timers, sensors, and predictable embedded work |
A Cortex-A board normally has an MMU and runs a full operating system. A Cortex-M microcontroller usually runs one firmware image directly and has much less memory, but it starts quickly, uses little power, and can keep doing one small job for a long time.
The Boards Side by Side
| Board | Core / processor | What it means in practice |
|---|---|---|
| Khadas VIM3 | 4× Cortex-A73 + 2× Cortex-A53 | big.LITTLE Linux computer with eMMC and an NPU; good for local processing and services |
| Raspberry Pi 5 | 4× 64-bit Cortex-A76 | Fast, general-purpose Linux computer with a large software and hardware ecosystem |
| Raspberry Pi Pico | 2× Cortex-M0+ in RP2040 | Small controller for radio, sensors, timing, and battery-powered field work |
| Raspberry Pi Pico 2 | RP2350 with Cortex-M33 or Hazard3 RISC-V options | Newer microcontroller platform; firmware must select and support the intended architecture |
Why More Cores Is Not the Whole Story
- A Pico can respond to a GPIO or radio event without waiting for a general-purpose operating system.
- A Pi 5 can run a database, compiler, VPN, dashboard, and gateway process at the same time.
- The VIM3's NPU is a separate accelerator; it is not another Cortex CPU core.
- Clock speed comparisons are meaningful only when the workload, memory, storage, and software are also comparable.
- A Linux board can be more powerful and still be the wrong choice for a node that must sleep for months.
From Cortex to LoRa
Pico / Pico 2: read sensor → make a small message → transmit → sleep Pi 5: receive mesh packets → validate → store → display → forward Khadas VIM3: receive packets → combine with local data → process at the edge → run an NPU workload or local service → forward a summary
The radio does not care which Cortex family produced the packet. What changes is how much work each board can do before and after the packet is sent.
A Note About Pico 2
RP2350 is especially interesting because it can support Arm Cortex-M33 or the Hazard3 RISC-V architecture. The Pico 2 board is therefore not simply a faster RP2040 with a new name. Check the firmware and SDK target when moving code between Pico generations, especially when a library depends on architecture-specific features.
For a practical RP2040-specific view of the Pico/Pico W Cortex-M0+ Thumb subset, ABI, startup, and safe GPIO assembly, read Raspberry Pi Pico W Assembly: RP2040, Cortex-M0+, and Thumb.
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